| Title/Position -Senior Design Engineer/Module Lead |
| Experience: 2-6 years |
| Location: Bangalore |
| Educational Qualification: BE/BTech |
| Technical skill sets: |
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Experience in FPGA based RTL design
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Synthesis and implementation on board testing of FPGA |
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Xilinx/Altera/Modelsim based functional simulation, static timing, analysis and microblaze |
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PPC 440 implementation in Xilinx
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FPGA Nios processor implementation in Altera |
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FPGA chip scope based debugging |