FFT IP Core
A Fast Fourier Transform IP Core that allows implementation of very long transforms on an FPGA using external RAM. The FFT IP Core is designed for Run time Programmability and Optimal Resource Utilization.
The Fast Fourier Transform IP Core (FFT IP Core) from Mistral allows implementation of very long transforms on an FPGA using external RAM. The Fast Fourier Transform FPGA supports run time programmable transform lengths from 256 to 1M (powers-of-2) points. The Maximum transform length is limited by the memory available.
Higher transform lengths are supported and depend on factory configuration. The Fast Fourier Transform Algorithm is designed for Run time Programmability and Optimal Resource Utilization.
The Fast Fourier Transform Algorithm uses the Divide-and-Conquer approach for FFT computation. This approach expresses an FFT of length N as a product of 2 integers, L x M. The L and M point FFTs are computed using a pipelined FFT block.
- Transform size, N = 2m, m = 8 to 20 (default). Can be customized
- Forward or inverse complex transform with run time configurability
- Run time computation of twiddle factors
- Single precision floating point arithmetic
- In-order input and output
- Supports data rate of 200MS/s* (complex data)